
module equalizer (
	input wire 			clk,
	input wire 			reset_n,

	input wire [4:0] 	coef_set,

	input wire 			ast_sink_data,
	output wire [23:0] 	ast_sink_ready,
	input wire 			ast_sink_valid,
	input wire 			ast_sink_sop,
	input wire 			ast_sink_eop,
	input wire [1:0] 	ast_sink_error,

	output wire [23:0] 	ast_source_data,
	input wire 			ast_source_ready,
	output wire 		ast_source_valid,
	output wire 		ast_source_sop,
	output wire 		ast_source_eop,
	output wire [5:0] 	ast_source_channel,
	output wire [1:0] 	ast_source_error
);


wire [23:0] filter_data;
wire 		filter_ready;
wire 		filter_valid;
wire 		filter_sop;
wire 		filter_eop;
wire [5:0] 	filter_channel;
wire [1:0] 	filter_error;

	
filter bandpass_filters(
	.clk						(clk),
	.reset_n					(reset_n),

	.coef_set				(coef_set),
	
	.ast_sink_data			(ast_sink_data),	
	.ast_sink_ready			(ast_sink_ready),
	.ast_sink_valid			(ast_sink_valid),
	.ast_sink_sop			(ast_sink_sop),
	.ast_sink_eop			(ast_sink_eop),
	.ast_sink_error			(ast_sink_error),

	.ast_source_data		(filter_data),
	.ast_source_ready		(filter_ready),
	.ast_source_valid		(filter_valid),
	.ast_source_sop			(filter_sop),
	.ast_source_eop			(filter_eop),
	.ast_source_channel		(filter_channel),
	.ast_source_error		(filter_error)
);

multiplier_ast_wrap multiplier(
	.clk					(clk),
	.reset_n				(reset_n),
	
	.ast_sink_data_a		(filter_data),	
	.ast_sink_data_b		(filter_data),	//this needs to have the gain input memory on it
	.ast_sink_ready			(filter_ready),
	.ast_sink_valid			(filter_valid),
	.ast_sink_sop			(filter_sop),
	.ast_sink_eop			(filter_eop),
	.ast_sink_channel		(filter_channel),
	.ast_sink_error			(filter_error),

	.ast_source_data		(ast_source_data),
	.ast_source_ready		(ast_source_ready),
	.ast_source_valid		(ast_source_valid),
	.ast_source_sop			(ast_source_sop),
	.ast_source_eop			(ast_source_eop),
	.ast_source_channel		(ast_source_channel),
	.ast_source_error		(ast_source_error)
);
	
endmodule
	